Field of the Invention
The invention relates to an integrated circuit for receiving a clock signal, particularly for receiving a clock signal that is subject to interference. The integrated circuit can be used in conjunction with a memory circuit.
Signals on data lines, such as data signals, clock signals or the like, are subject to influences from the environment that interfere with the signals. In particular, high-frequency signals are particularly susceptible to environmental influences.
Data are frequently transferred to a semiconductor memory circuit synchronously, i.e. with respect to a clock signal. A critical factor in this context is the instant in time at which the data signal is transferred to a reception circuit. The instant is determined by an edge of the clock signal, couched in more precise terms the instant at which the data signal is transferred is determined by the appearance of a particular voltage level at a clock input. If external interference influences the clock signal, then the instant at which the data signal is transferred to the reception circuit moves, which can result in errors when transferring the data signal.
It is accordingly an object of the invention to provide an integrated circuit for receiving a clock signal that overcomes the above-mentioned disadvantages of the prior art devices of this general type, which can be used to minimize interference in a clock signal and where the clock signal can be reliably used to transfer a data signal.
With the foregoing and other objects in view there is provided, in accordance with the invention, an integrated circuit. The circuit contains a clock input for receiving a clock signal, a receiver circuit, and a filter circuit having an input connected to the clock input for filtering out a frequency and/or a frequency range of the clock signal. The filter circuit has an output and generates a filtered clock signal available at the output. The output is connected to the receiver circuit and the receiver circuit receives the filtered clock signal. The receiver circuit forwards the filtered clock signal for further processing.
The integrated circuit in accordance with the invention has a clock input and a receiver circuit, with a clock signal being able to be applied to the clock input. A filter circuit is provided between the clock input and the receiver circuit for the purpose of filtering out a frequency range of the clock signal. The filtered clock signal is routed to the receiver circuit in order to transfer the filtered clock signal to the integrated circuit for processing.
Normally, interference signals prevail in clock signals in one or more particular frequency ranges. Such interference is able to corrupt the clock signal such that a latch instant, i.e. the instant at which data are transferred to a data latch, for example, is offset from an ideal latch instant. The inventive integrated circuit has the advantage that the clock signal is filtered by a filter circuit, such that the frequency range in which interference predominantly occurs is filtered out by the filter circuit. The filtered clock signal is then supplied to a receiver circuit, after which it can be used for transferring data in a data signal.
The use of such a filter circuit for removing interference from data signals is not all that useful, however, since the interference limited to a particular frequency range has only little influence on the quality of the data signal.
Preferably, provision can be made for the filter circuit to be controlled by a control circuit. To this end, the control circuit can have a setting memory which stores setting values, with the control circuit controlling the filter circuit on the basis of the setting values. This has the advantage that the integrated circuit for receiving the clock signal can be matched to the particular preferred interference arising. The circuit is matched by storing setting values in the setting memory, and the matching defines frequencies or frequency ranges which are masked from the clock signal by the filter circuit.
The receiver circuit preferably has a differential amplifier circuit that is able to compare the signal voltage level with a reference voltage level and to assign an instantaneous signal value to the instantaneous signal voltage level. When the inventive integrated circuit has filtered out the fundamental interference signals from the clock signal, the edges of the clock signal essentially correspond to the edge of the ideal clock signal, so that the instant at which the signal value of the clock signal changes is not affected by interference.
Preferably, provision can also be made for the filter circuit to be implemented in a digital circuit, as a result of which frequencies or frequency ranges that are to be filtered out can be set very precisely. There is thus no need to vary analog components for an analog filter circuit.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an integrated circuit for receiving a clock signal, particularly for a semiconductor memory circuit, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.